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есть еще в природе такой интересный цветок: BrainChip Inc со своим чипом SNAP: Autonomous Feature Extraction (AFE) System Developed: Unsupervised Visual Learning Achieved Это хитрый FPGA с биореалистичными синапсами: The AFE system is digital and hardware based (not a software program) The circuit implementation of SNAP64 is all-digital although the spikes are spatially and temporally distributed and asynchronous. The SNAP64 RTL has been implanted on a FPGA board from Dini Group La Jolla Inc. (La Jolla, Calif.) with multiple 20 million gate Xilinx FPGAs. The SNAP64 architecture is designed to access 65536 (64k) neurons within the same chip, and chips can be stacked to a total of 2^48 = 256B neurons. SNAP64 is fully configurable; the neurotransmitter type and level, neuro-modulators, synaptic connections, and neuron type can be configured through a microprocessor interface. Alternatively, these parameters can be set in the RTL for a dedicated design a closer modelling of biological neural networks; including the spike train method of data transfer and modelling of multiple modulations of signals at the synaptic connection. Synapses are at this time 18 bits wide, but there can be thousands of synapses contributing to the membrane potential of the neuron. The integrator in the dendrites is 22 bits wide, and the soma integrator is 24 bits wide. These component widths are easily configurable in the RTL if we need more or less resolution. The number of neurons and synapses is configurable in the RTL. We could put as many as 10,000 neurons and 5 million synapses on a single die. These are neurons that behave like biological neurons with multiple spiking modes and dynamic, temporal integrating synapses The system is implemented in digital hardware using BrainChip's unique parallel technology. All neurons and synapses are updated at a rate of one million per second. BrainChip's spiking neural network connectivity can be externally configured. Synapses are dynamic, that is, the properties of synapses change over time using the STDP learning rule. The output of many synapses is integrated by dendrites and a soma. The output of a soma is fed to a neuron's axon that emits one or more output spikes when a previously learned pattern is recognized. The spike from an axon is transmitted to the connected synapses using a proprietary fast communication protocol. The use of distributed memory located at the synapses means that SNAP64 is capable of updating neurons at a rate of millions per second and this has been taken up to 4Mupdates/s in an FPGA implementation The neurons and synapses are not multiplexed – unlike other designs like IBM's TrueNorth which are multiplexed 256x and do not learn. The advantage of not multiplexing is that they are thousands of times faster, that all memory can be distributed, which simplifies the learning method. The learning method we use is STDP – Spike Time Dependent Plasticity, which constantly accesses memory ------ The AVFE system was developed and interfaced with the DAVIS artificial retina purchased from its developer, Inilabs of Switzerland. DAVIS has been developed to represent data streams in the same way as BrainChip's neural processor, SNAP. Learns and identifies patterns in the image stream within seconds -- (Unsupervised Feature Learning) The system initially has no knowledge of the contents of an input stream. The system learns autonomously by repetition and intensity, and starts to find patterns in the image stream. BrainChip's SNAP learns to recognize features within a few seconds --->>